OSA 5410 Series synchronisation distribution and assurance devices

The OSA 5410 Series is a family of compact and cost-effective synchronisation distribution and assurance devices that utilise Syncjack on any network. Following a toolbox approach, the members of the OSA 5410 series can be used in a variety of network synchronisation applications including IEEE 1588v2 Access Grandmaster, Boundary and Slave Clock, GNSS receiver and Primary Reference Time Clock (PRTC), synchronisation signal conversion and sync probe applications.

Timing can be easily distributed and assured throughout a network over existing packet infrastructure. Timing performance is continuously monitored while in service, and alarmed if needed. A valuable new approach for timing distribution is made available to mobile network operators: the ability to efficiently distribute timing from the network edge and assure that base station clocks are precisely tracking their master.

The series supports all Syncjack functions and tools. Syncjack is a technology for timing distribution, monitoring and timing service assurance. It includes three main functionalities: Clock Accuracy, Clock Analysis and PTP Network Analysis. Clock Accuracy measures the frequency and phase accuracy of clocks relative to a synchronisation reference, which can be internal, external, recovered or originating from a GNSS signal. Syncjack continuously performs Clock Analysis, including frequency and phase accuracy of the PTP packet domain, even when a synchronisation reference is unavailable. Syncjack also continuously performs PTP Network Analysis, including monitoring and testing of the PTP communication path.

Features include: Syncjack technology for timing distribution, monitoring and testing; brings precise IEEE 1588v2 PTP frequency and phase synchronisation to radio access networks; built-in GNSS receiver and Grandmaster Clock functionality; extended holdover performance by Rubidium clock option; configurable to operate in Slave, Boundary and Grandmaster Clock mode; precise clock accuracy measurement and enhanced statistics; high-availability design including APTS clock selection, automatic asymmetric delay compensation and power supply redundancy.